The subject matter disclosed herein relates to design of integrated circuits. Specifically, the subject matter disclosed herein relates to more efficiently projecting slack during design of integrated circuits.
As structural dimensions of integrated circuits have become ever-smaller, meeting design conditions across a plurality of these devices has become more difficult. In analyzing functions of these devices, designers often look to the timing quantities (e.g., slacks) of paths through a circuit to determine which paths are most likely to affect device performance. Particularly, designers attempt to find the paths through the circuit which have the highest probability of affecting performance, i.e., being “critical.” Due to process variations across a plurality of devices, each timing quantity (i.e., slack) is a statistical distribution. That is, each timing quantity for a given path has a probability distribution indicating the path's likelihood of having such a timing performance across a plurality of devices. Several techniques exist for timing propagation of statistical distributions, but the most computationally efficient typically rely on propagation of Gaussian distributions.
Oftentimes these distributions do not accurately reflect the entirety of timing quality range for a particular design. Rather, a more accurate indication of the timing quantities would be achieved by truncating a part of the distribution curve. However, this truncating significantly reduces computational performance, as it renders the resultant distributions non-Gaussian in nature.